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[Compress-Decompress algrithms] rd1010_source_code

Description: 使用FPGA做SDRAM控制器 -SDRAM controller using FPGA so
Platform: | Size: 357376 | Author: | Hits:

[VHDL-FPGA-Verilog] xapp134_vhdl

Description: The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.-err
Platform: | Size: 2628608 | Author: ronsullivan | Hits:

[VHDL-FPGA-Verilog] SDRAMconntrol

Description: SDRAM控制器的设计与VHDL实现 是pdf格式的。在工程中实现过-SDRAM Controller Design with VHDL realize is pdf format. In the projects implemented
Platform: | Size: 138240 | Author: hjx | Hits:

[VHDL-FPGA-Verilog] SDR_SDRAM_controler_verilog

Description: 可以用的通用SDRAM控制器,可以用在FPGA上,是SDR类型的-Can use the generic SDRAM controller can be used in the FPGA, the SDR is the type of
Platform: | Size: 9216 | Author: 郑宏超 | Hits:

[VHDL-FPGA-Verilog] hssdrc.tar

Description: 高速SDRAM控制器，并提供仿真测试程序和较详细的文档。-High-speed SDRAM controller, and provide simulation testing procedures and more detailed documents.
Platform: | Size: 424960 | Author: yuhl | Hits:

[VHDL-FPGA-Verilog] 61EDA_C52

Description: 标准SDR SDRAM控制器参考设计，有助于大家学习和参考-Standard SDR SDRAM controller reference design will help everyone to learn and reference
Platform: | Size: 205824 | Author: 王廷龙 | Hits:

[Other] sdramcontol

Description: SDRAM的 详细构造,工作原理,控制说明-SDRAM detailed structure, working principle, control description
Platform: | Size: 859136 | Author: li ji wei | Hits:

[VHDL-FPGA-Verilog] an499_design_example

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
Platform: | Size: 433152 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] an499_CN

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。 pdf 的说明文件-CPLD control 8-32M sdram controller maxII epm570 realize. pdf documentation
Platform: | Size: 192512 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] DDR_SDRAM_verilog

Description: DDR（双速率）SDRAM控制器参考设计verilog代码，可以直接用的，很好的-DDR (double rate) SDRAM controller reference design Verilog code, can be directly used, very good
Platform: | Size: 752640 | Author: 宋珂 | Hits:

[Other] sdram_all

Description: sdram 控制器的verilog 实现，包括用户逻辑和控制器的设计-SDRAM controller Verilog realization, including user logic and controller design
Platform: | Size: 505856 | Author: shroy | Hits:

[VHDL-FPGA-Verilog] sdram_ver_134

Description: SDRAM控制器的源代码打包下载，不错不错值得-SDRAM controller source code pack download, well worth a good try
Platform: | Size: 115712 | Author: jinyong | Hits:

[VHDL-FPGA-Verilog] 1189152740

Description: DDR2 SDRAM 控制器的FPGA实现-DDR2 SDRAM controller FPGA to achieve
Platform: | Size: 84992 | Author: 白皓 | Hits:

[VHDL-FPGA-Verilog] hssdrc_latest.tar

Description: HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is licensed under MIT License
Platform: | Size: 424960 | Author: Arun | Hits:

[ARM-PowerPC-ColdFire-MIPS] OXE800SE_OXE800DSE

Description: SATA NAS SOC，200MHz ARM926EJS核 SATA接口的NAS用处理器，集成USB2.0 HOST接口，Ethernet控制器，DDR SDRAM控制器，PCI HOST接口，可以扩展PCI外设。-SATA NAS SOC，NAS COntroller with 200MHz ARM926EJS core, intergated SATA controller，USB2.0 HOST controller，Ethernet MAC controller，DDR SDRAM controller，PCI HOST。
Platform: | Size: 974848 | Author: gxliu | Hits:

[VHDL-FPGA-Verilog] altera_sdram

Description: SDRAM控制器的VHDL代码在FGPA中的综合与实现-SDRAM controller VHDL code FGPA and implementation of integrated
Platform: | Size: 2383872 | Author: Mr Yang | Hits:

[Other] sdram

Description: 在ISE开发环境下的单速率SDRAM简单读写控制器设计，用的是verilog硬件描述语言-ISE development environment in a single-rate SDRAM controller read and write simple design, using the verilog hardware description language
Platform: | Size: 157696 | Author: 小桂 | Hits:

[Other] Sdram_Control_4Port

Description: SDRAM控制器HDL实现，sdram为美光公司的-sdram controller
Platform: | Size: 3072 | Author: paladin | Hits:

[Other] module

Description: SDRAM控制器源代码，已经过调试，可以试用一下。-SDRAM controller source code, has been testing, you can try.
Platform: | Size: 7168 | Author: qaz | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: verilog 128位 突发4. sdr fpga控制器-verilog 128 bit unexpected 4. sdr fpga controller
Platform: | Size: 119808 | Author: pudnrtest | Hits:
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